AIPS DDT Tests to evaluate the Weitek Sparc2 Upgrade Chip

Henrietta May, 4th November 1993 and 23rd November 1993

ATNF, Sydney, Australia

The Weitek 'POWER uP' chip, based on the Weitek W8601 Sparc CPU, is a replacement for the Sparc 2 or IPX CPU and uses clock-doubling technology, on-chip caching and architectural improvements to significantly improve the preformance of the Sparc 2. It cost us A$2995.

The AIPS DDT medium and large tests were run on a Sparc 2 before and after the Weitek upgrade. The machine used was Mensa, a Sparc 2 with 32mb memory and running SunOS 4.1.1.

The upgrade was straight-forward and took only 30 minutes, using the tools provided with the chip.

At the time of these tests mensa was operating as a /usr and /usr/local server and was lightly loaded, so results give only a rough indication of performance. The data was on a single local SCSI disk and the AIPS system was NFS mounted.

The AIPS system was ATNF-AIPS Version of 15OCT92.

Results of Timing Tests

These are given as CPU times in seconds and the time taken after the upgrade as a percentage of the time taken before the upgrade. For some tasks the average of several runs is given. The total times include multiple runs of UVSRT, UVDIF, SUBIM and COMB.


                          MEDIUM TEST                    LARGE TEST
                 CPU Time (secs)   Real Time (secs)   CPU Time (secs)
                 Before  After  %  Before After  %     Before  After  %
                 ------------- --   ------------ --     ------------- --
UVSRT (2)         4.9    3.8   78      8    8   100      36.2   27.8  77
UVDIF (2)         3.7    2.0   54     10    8    80      20.5   11.6  57
CCMRG             3.0    2.2   73      6    5    83       7.8    5.8  74
SUBIM (2)         1.7    1.2   71      3    3   100       5.8    4.2  72
COMB  (8)         2.0    1.6   80      4    4   100       6.4    5.2  81
 
UVMAP            42.3   26.8   63     49   37    76     190.9  133.7  70
APCLN cln       613.1  409.6   67    653  428    70    2006.2 1317.0  66
APCLN res        40.4   23.3   58     48   28    58     181.7  107.3  59
ASCAL           372.5  183.9   49    397  194    49    7840.6 4206.7  54
MX    map        47.5   27.2   57     58   39    67     171.7  103.4  60
MX    cln       806.1  431.3   54    869  470    54    2785.5 1565.8  56
VTESS           169.3   95.2   56    192  112    58     870.0  513.3  59
                 ------------- --   ------------ --     ------------- --
Total (including 2130  1226    58   2346 1412    60    14229   8080   57
  multiple runs)

Results of Accuracy Tests

DDT compares computed images with master images and records the peak and RMS differences in units of bits, with respect to the peak of the master image. Results from the NRAO Sparc 2, Baboon, as published in AIPS Memo 77 are included for comparison. EDGSKP=8 was used for these tests.

MEDIUM TEST

                    Peak                    RMS                  Points Diff
           Baboon  Before  After   Baboon  Before  After   Baboon  Before After
           ---------------------   --------------------    --------------------
UVSRT                                                      0,0,2   0,0,2  0,0,2
UVMAP        15.2   15.1   15.1     18.2   18.2   18.2      
UVBEAM       15.2   15.3   15.3     18.7   18.7   18.7
APCLN cln    11.8   11.8   11.8     14.7   14.7   14.7
APCLN res    15.3   15.3   15.3     21.2   21.3   21.3
ASCAL                                                      0,0,2   0,0,2  0,0,2
MX    map    14.9   14.9   14.9     18.2   18.2   18.2
MX   beam    15.4   15.4   15.4     18.7   18.7   18.7
MX    cln     8.1    8.1    8.1     12.7   12.7   12.7
VTESS        21.1   21.1   21.1     29.0   29.0   29.0

Conclusion

With the installation of the new Weitek CPU, the total CPU time taken was 58% of that before the installation for the medium DDT test and 57% for the large test. The total Real Time for the medium test taken after the installation was 60% of that taken before.

The accuracy results were unchanged by the installation of the Weitek CPU, indicating that the Weitek chip has retained the IEEE floating point compliance of the Sparc 2.

The Weitek Sparc POWER uP chip thus lived up to it's promise to significantly increase the performance of the Sparc 2. With a fast SCSI interface it would be comparable with a Sparc 10/30 and very good value for money.

Henrietta May, aipsmngr@atnf.csiro.au
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